Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor

Authors

  • Eric J. Stotzer
  • Ernst L. Leiss

DOI:

https://doi.org/10.19153/cleiej.15.2.3

Abstract

Code size is a primary concern in the embedded computing community. Minimizing physical memory requirements reduces total system cost and improves performance and power efficiency. VLIW processors rely on the compiler to statically encode the ILP in the program before its execution, and because of this, code size is larger relative to other processors. In this paper we describe the co-design of compiler optimizations and processor architecture features that have progressively reduced code size across three generations of a VLIW processor.

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Published

2012-08-01

Issue

Vol. 15 No. 2 (2012): Special issue of best papers presented at CLEI 2011, Quito, Ecuador

Section

Articles

License

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